Tim

San Jose, CA

http://stackoverflow.com/users/1236185/tim

Professional ASIC engineer with experience in RTL design, Verilog, synthesis, power, and timing issues on billion+ gate ICs.

Other hobbies include:

  • Computer Graphics
  • Android Programming
  • C++ Programming

Personal released projects:

  • Portfolio Map for Android (Pro)
  • Electron Flux for Android

Portfolio Map-----------Electron Flux

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