Electronic Engineer and self-employed consultant, Physics degree, working in VHDL, Verilog, and C++, primarily in FPGA and ASIC design. I've written two compilers, including one which generates Verilog (9-pass, about 50K lines of C++). I'll add VHDL output if/when I get some spare time. I also have experience in SystemC and Specman/'e'.
Always looking for new opportunities - mail me if you want to discuss anything; I'm on
Q&A for professional and enthusiast programmers
Q&A for people interested in statistics, machine learning, data analysis, data mining, and data visualization
Q&A for computer enthusiasts and power users
Q&A for electronics and electrical engineering professionals, students, and enthusiasts
Q&A for system and network administrators
Q&A for Information security professionals